The present invention relates to a semiconductor integrated circuit technology, and more particularly, to a sub word line driver and a semiconductor integrated circuit device having the same.
A semiconductor memory device, particularly DRAM, is designed such that one main word line selectively activates one of a plurality of sub word lines. For example, when 64 main word lines exists and 8 sub word lines exist per main word line, one main word line activates one of the 8 sub word lines.
In order to control the sub word lines, a sub word line driver is disposed near a memory cell array. The sub word line driver is generally configured to include a CMOS inverter and a keeper transistor connected to an output terminal of the CMOS inverter. Here, the CMOS inverter receives a main word line signal, and the keeper transistor is used to prevent a problem caused by floating of non-selected sub word lines.
As the sub word line driver is configured to include the CMOS inverter and the keeper transistor composed of NMOS transistors as described above, the sub word line driver includes one PMOS transistor and two NMOS transistors. Therefore, the sub word line driver requires two wells disposed to be spaced apart from each other, and the two wells occupy a certain area.
As the integration density of a memory cell array of a semiconductor memory device is decreased, the area of a control circuit region is also decreased, and accordingly, it is required to decrease the area of the sub word line driver.